block diagram packages product summary v offset 600vmax i qbs 1ma v in +/-260mvmax gain temp.drift 20ppm/ o c (typ.) f o 40khz (typ.) overcurrent trip 1.5usec (typ) signal delay (ir2172) overcurrent trip level +/-260mv (typ.) linear current sensing ic 8-lead pdip 8-lead soic features ? floating channel up to +600v ? monolithic integration ? linear current feedback through shunt resistor ? direct digital pwm output for easy interface ? low i qbs allows the boot strap power supply ? independent fast overcurrent trip signal ? high common mode noise immunity ? input overvoltage protection for igbt short circuit condition ? open drain outputs description IR2171/ir2172 are monolithic current sensing ic designed for motor drive applications. it senses the motor phase current through an external shunt resistor, converts from analog to digital signal, and transfers the signal to the low side. ir?s proprietary high voltage iso- lation technology is implemented to enable the high bandwidth signal processing. the output format is dis- crete pwm to eliminate need for the a/d input interface for the ir2172. the dedicated overcurrent trip (oc) sig- nal facilitates igbt short circuit protection. the open- drain outputs make easy for any interface from 3.3v to 15v. preliminary data sheet no. pd60192 rev. f IR2171/ir2172 ( s ) (refer to lead assignments for correct pin configuration). this/these diagram(s) show electrical connections only. please refer to our application notes and designtips for proper circuit board layout. vb v+ v- vs vcc po com IR2171/ ir2172 gnd 15v to motor phase pwm output up to 600v nc (oc 2172) overcurrent (note: for new designs, we recommend ir?s new products ir2175 and ir2175(s)
2 IR2171/ir2172 www.irf.com symbol definition min. max. units v s high side offset voltage -0.3 600 v bs high side floating supply voltage -0.3 25 v cc low side and logic fixed supply voltage -0.3 25 v in maximum input voltage between v in+ and v in- -5 5 v po digital pwm output voltage com -0.3 vcc +0.3 v oc overcurrent output voltage (ir2172) com -0.3 vcc +0.3 v in- v in- input voltage (note 1) v s -5 v b+ 0.3 dv/dt allowable offset voltage slew rate ? 50 v/ns p d package power dissipation @ t a +25 c 8 lead soic ? .625 8 lead pdip ? 1.0 rth ja thermal resistance, junction to ambient 8 lead soic ? 200 8 lead pdip ? 125 t j junction temperature ? 150 t s storage temperature -55 150 t l lead temperature (soldering, 10 seconds) ? 300 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param eters are absolute voltages referenced to com, all currents are defined positive into any lead. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. v c/w w note 1: capacitors are required between vb and vin-, and between vb and vs pins when bootstrap power is used. the external power supply, when used, is required between vs and vin-, and between vb and vs pins. c recommended operating conditions the output logic timing diagram is shown in figure 1. for proper operation the device should be used within the recom- mended conditions. symbol definition min. max. units v b high side floating supply voltage v s +13.0 v s +20 v s high side floating supply offset voltage 0.3 600 v po digital pwm output voltage com vcc v oc overcurrent output voltage com vcc v cc low side and logic fixed supply voltage 9.5 20 v in input voltage between v in+ and v in- -260 +260 mv t a ambient temperature -40 125 c v
3 IR2171/ir2172 www.irf.com v in nominal input voltage range before saturation -260 ? 260 |v in+ _ v in- | v oc+ overcurrent trip positive input voltage ? 260 ? v oc- overcurrent trip negative input voltage ? -260 ? v os input offset voltage -10 0 10 v in = 0v (note 1) ? v os / ? t a input offset voltage temperature drift ? 25 ? v/ o c g gain (duty cycle % per v in ) 157 162 167 %/v max gain error=5% (note 2) ? g / ? t a gain temperature drift ? 20 ? ppm/ o c i lk offset supply leakage current ? ? 50 a v b = v s = 600v i qbs quiescent v bs supply current ? 1 2 v s = 0v i qcc quiescent v cc supply current ? ? 0.5 lin linearity (duty cycle deviation from ideal linearity ? 0.5 1 % curve) ? v lin / ? t a linearity temperature drift ? .005 ? %/ o c i opo digital pwm output sink current 20 ? ? 2?? i occ oc output sink current (ir2172) 10 ? ? 1?? dc electrical characteristics v cc = v bs = 15v, and t a = 25 o c unless otherwise specified. symbol definition min. typ. max. units test conditions note 1: 10mv offset represents 1.5% duty cycle fluctuation note 2: gain = (full range of duty cycle in %) / (full input voltage range). ma mv ma v o = 1v v o = 0.1v v o = 1v v o = 0.1v v cc = v bs = 15v, and t a = 25 o c unless otherwise specified. symbol definition min. typ. max. units test conditions propagation delay characteristics fo carrier frequency output 35 41 47 khz ? f / ? t a temperature drift of carrier frequency ? 500 ? ppm/ o c dmin minimum duty ? 7 ? % dmax maximum duty ? 93 ? % v in +=+260mv,v in -=0v bw fo bandwidth 15 khz phs phase shift at 1khz -10 o tdoc propagation delay time of oc (ir2172) 1 1.5 ? twoc low true pulse width of oc (ir2172) ? 1 ? ac electrical characteristics figure 1 v in = 0 & 5v v in +=-260mv,v in -=0v v in + = 100mvpk -pk sine wave, gain=-3db v in + =100mvpk-pk sine wave sec
4 IR2171/ir2172 www.irf.com application hint: temperature drift of the output carrier frequency can be cancelled by measuring both a pwm period and the on-time of pwm (duty) at the same time. since both periods vary in the same direction, computing the ratio between these values at each pwm period gives consistent measurement of the current feedback over the temperature drift. vin+= -260mv vin- = 0v vin+= +260mv vin- = 0v duty=93% duty=7% carrier frequency = 40khz po po timing waveforms figure 1 output waveform figure 2. oc waveform (2172 only) +260mv -260mv vin oc t woc t doc
5 IR2171/ir2172 www.irf.com lead assignment lead definitions symbol description v cc low side and logic supply voltage com low side logic ground v in+ positive sense input v in- negative sense input v b high side supply v s high side return po digital pwm output oc overcurrent output (negative logic) (ir2172 only) n.c. no connection ir2172s 8 7 6 4 3 2 1 vcc oc po com vs vin- vin+ vb 5 8 lead soic ir2172 8 7 6 4 3 2 1 vcc oc po com vs vin- vin+ vb 5 8 lead pdip IR2171 8 7 6 4 3 2 1 vcc nc po com vs vin- vin+ vb 5 8 lead pdip IR2171s 8 7 6 4 3 2 1 vcc nc po com vs vin- vin+ vb 5 8 lead soic
6 IR2171/ir2172 www.irf.com 01-6014 01-3003 01 (ms-001ab) 8 lead pdip case outlines 01-6027 01-0021 11 (ms-012aa) 8 lead soic 87 5 65 d b e a e 6x h 0.25 [.010] a 6 4 3 12 4. outline conforms to jedec outline ms-012aa. notes: 1. dimensioning & tolerancing per asme y14.5m-1994. 2 . c o n t r o l l in g d im e n s io n : m il l im e t e r 3. dimensions are shown in millimeters [inc hes]. 7 k x 45 8x l 8x c y footprint 8x 0.72 [.028] 6.46 [.255] 3x 1.27 [.050] 8x 1.78 [.070] 5 dimension does not include mold protrusions. 6 dimension does not include mold protrusions. mo ld p rotrus io ns no t to exc eed 0.25 [.010]. 7 dimens ion is the leng th of lead fo r soldering to a substrate. mo ld p rotrus io ns no t to exc eed 0.15 [.006]. 0.25 [.010] c a b e1 a a1 8x b c 0.10 [.004] e1 d e y b a a1 h k l .189 .1497 0 .013 .050 b asic .0532 .0040 .2284 .0099 .016 .1968 .1574 8 .020 .0688 .0098 .2440 .0196 .050 4.80 3.80 0.33 1.35 0.10 5.80 0.25 0.40 0 1.27 basic 5.00 4.00 0.51 1.75 0.25 6.20 0.50 1.27 min max millimeters in c h e s min max dim 8 e c .0075 .0098 0.19 0.25 .025 b asic 0.635 b asic 1/27/2004
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